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Computer Network Practice Questions for Gate CSE Exam 1. Suppose ‘A’ and ‘B’ are on same 10Mbps Ethernet segment and the propagation delay between two nodes is 275 bit times. Suppose A and B are on two ends of the wire and tries to send a frame at time t=0 and frames collide. Then at what time (in bits) they finish transmitting a jam signal. Assume 48 bit jam signal.A. 598 B. 323 C. 502 D. 227 Solution: Option B 2. Suppose each station in IEEE 802.5 with 1bit delay is 48m apart from its neighbouring stations. Token is of 3 Bytes and propagation delay is 2.4 * 108 m/sec. To avoid overlapping in the 4Mbps token ring in the monitor must insert 15 bits of artificial delay ...
Computer Science Junction...
Tag :computer science study material for gate exam
  November 1, 2017, 6:43 am
What is rational rose software?    INTRODUCTIONRational Rose is a set of visual modeling tools for development of object-oriented Modeling is the process of graphically depicting the system to be developed.It helps us in Presenting the essential details and it Filters out non-essential details. The rational rose software helps us to understand the system from different perspectives.Applications of Rational ROSE SoftwareRational rose software is basically used to draw UML diagram. It is a professional and widely used in industry and academics to make the diagram during the design phase of software development lifecycle. ·   &nb...
Computer Science Junction...
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  October 29, 2017, 4:54 pm
आत्म विश्वाश बढ़ाने के लिए कुछ जरूरी टिप्स "How to increase  self confidence ?""अक्सर हमारी जिंदगी में ऐसे पड़ाव भी आते हैं, जब हम  लगातार मिल रही असफलता की वजह  से अपना आत्मविश्वाश खोने लगते हैं और धीरे धीरे खुद को बहुत अकेला महसूस करने लगते हैं ।  ऐसे हालात  के आने का कोई समय या कोई ...
Computer Science Junction...
Tag :Self confidence improvement tips
  October 26, 2017, 5:49 am
Computer Science Study Material for Gate: Addressing modes and its typeIn this study material for gate computer science, we are going to explain different types of addressing modes. We have examined the types of operands and operations that may be specified by machine instructions. Now we have to see how is the address of an operand specified, and how are the bits of an instruction organized to define the operand addresses and operation of that instruction.Addressing Modes: The most common addressing techniques are• Immediate• Direct• Indirect• Register• Register Indirect• Displacement• StackAll computer architectures provide more than one of these addressing modes. The questio...
Computer Science Junction...
Tag :computer science study material for gate exam
  October 23, 2017, 6:13 am
Learn Computer Organization and ArchitectureHere you will get various articles, Practice Questions Set, Interview Questions  related to Computer Organization and Architecture and examples that will help you to solve the operating system based questions for Gate Exam. This post also consists of the gate study material for computer science exam     Concept-based  Articles1. Mapping Techniques used for Cache Memory Based Computer Science Study Material for Gate2.Computer Science Study Material for Gate: Addressing Modes and It's TypePractice Questions Sets1. Memory, I/O Interface and Control Design based Computer Science Study Material for Gate (Practice Set)2...
Computer Science Junction...
Tag :computer science study material for gate exam
  October 15, 2017, 4:15 pm
Mapping Techniques for Cache MemoryThree types of mapping procedures used for cache memory(i) Associative mapping(ii) Direct mapping(iii) Set-associative mapping(i) Associative mappingThe fastest and most flexible cache organization uses an associative memory. The organization is illustrated. The associative memory stores both the address and content (data) of the memory word. This permits any location in cache to store any word from main memory. The diagram shows three words presently stored in the cache. The address value of 15 bits is shown as a five-digit octal number and itscorresponding 12-bit word is shown as a four-digit octal number and its corresponding 12-...
Computer Science Junction...
Tag :gate study material for computer science
  October 14, 2017, 6:49 am
COMPUTER ORGANIZATION  ARCHITECTUREPractice Set 71. A program consists of four major types of instructions. The instruction mix and the CPI for each instruction type are given in the following table.If the clock frequency of the processor is 400 MHz, what is the average CPI of the processor?(a) 3.75 (b) 2.87(c) 1.87 (d) 1.542. Which of the following best characterize computer that uses memory mapped I/O?(a) the computer provides special instruction for manipulating I/O port(b) I/O ports are placed at addresses on bus and are accessed just like other memory location(c) to perform an I/O operation, it is sufficient to place the data in an address and call the channelto perform the operati...
Computer Science Junction...
Tag :gate study material for computer science
  October 11, 2017, 8:11 pm
 Practice Questions  for Gate Exam  Practice SET 11. A memory system consisting of two levels L1 and L2. The required access times of those are 5 ns and 120 ns respectively. Another memory system has also two levels L3 and L4 whose access time are 10 ns and 150 ns respectively. The hit ratio of second system is 0.8 and average access time is twice than that of first system. What is the hit ratio of first system?(a) 0.38 (b) 0.5(c) 0.75 (d) 0.872. A two level memory system has levels with access time T1 = 15 ns and T2 = 200 ns. The hit ratio for this system is 0.9. If hit ratio is made to 1 then what will be the new value of T1?(a) 10 ns (b) 15 ns(c) 20 ns (d) 25 ns3. In the ab...
Computer Science Junction...
Tag :computer science study material for gate exam
  October 10, 2017, 4:16 am
COMPUTER ORGANIZATION AND ARCHITECTUREPractice Set 6 - SOLUTIONS1. Consider the following statements.S1: The RISC processor has CPI always 1.S2: In horizontal instruction control signals are always in encoded form.S3: In vertical instruction control signals are always in encoded form.S4: In terms of speed vertical instruction is slower than horizontal instruction.Which of the above statements are true?(a) Only S1 and S2 (b) Only S2 and S3(c) Only S1, S3 and S4 (d) None of the aboveSolution: Option (c)Explanation:(c)S1 is true property of RISC architecture.S2 is false, horizontal instruction control signals are always in decoded form.S3 is true, vertical instruction control signals are always...
Computer Science Junction...
Tag :computer science study material for gate exam
  October 7, 2017, 6:32 am
COMPUTER ORGANIZATION AND ARCHITECTUREPractice Set 6Practice These Questions1. Consider the following statements.S1: The RISC processor has CPI always 1.S2: In horizontal instruction control signals are always in encoded form.S3: In vertical instruction control signals are always in encoded form.S4: In terms of speed vertical instruction is slower than horizontal instruction.Which of the above statements are true?(a) Only S1 and S2 (b) Only S2 and S3(c) Only S1, S3 and S4 (d) None of the above2. Computer uses addressing mode technique for __________.(a) giving program versatility to user by providing facilities as a pointer to memory counters forloop control(b) reducing number of bits in the...
Computer Science Junction...
Tag :computer science study material for gate exam
  October 7, 2017, 5:41 am
COMPUTER ORGANIZATION(Machine Instructions, Addressing Models, ALU & Data Path)PRACTICE SET 1Practice Questions in Computer Architecture and Organization for Gate Exam1. Which of following may not definitely occur in an instruction cycle?(i) Fetch cycle (ii) Execution cycle(iii) Indirect cycle(a) (i) only (b) (i) and (ii)(c) (iii) only (d) (ii) and (iii)2. Most relevant addressing mode to write position independent code is(a) Direct (b) Indirect(c) Relative (d) Indexed Mode3. Which set of instruction transfers the memory word specified by the effective address to AC or Load to AC?(a) DR←M[AR]AC←AC+DR,E←COUT,SC←O (b) DR←M[AR]AC←DR,SC←O(c) M[AR]←AC,SC←O (d) DR←M[AR]AC...
Computer Science Junction...
Tag :computer science study material for gate exam
  October 3, 2017, 6:23 pm
COMPUTER ORGANIZATION AND ARCHITECTUREPractice Set 3(Instruction Pipelining, Cache & Main memory, Secondary Storage)1. More than one word is put in one cache block to(a) Exploit temporal locality references in a program(b) Exploit spatial locality references in a program(c) Reduce miss penalty(d) All of these2. A pipeline P is found to provide a speedup of 6.16 when operating at 100 MHz and an efficiency of 88 percent. How many stages does P have?3. How big is a four way set associative cache memory with a block size of 64 Bytes and containing 1024 sets?4. A five stage pipeline has a clock cycle time of 5ns. If the non-pipeline clock is also of the same duration than what is the speed up...
Computer Science Junction...
Tag :computer science study material for gate exam
  October 2, 2017, 6:13 am
COMPUTER ORGANIZATION AND ARCHITECTURE(Instruction Pipelining, Cache & Main memory, Secondary Storage)PRACTICE SET 3 - SOLUTIONS1. More than one word is put in one cache block to(a) Exploit temporal locality references in a program(b) Exploit spatial locality references in a program(c) Reduce miss penalty(d) All of theseSolution: Option (b)2. A pipeline P is found to provide a speedup of 6.16 when operating at 100 MHz and an efficiency of 88 percent. How many stages does P have?Solution: From 7.21 To 6.79Explanation: Clock Time=10ns, 88100[p×1010]=6.16, p=73. How big is a four way set associative cache memory with a block size of 64 Bytes and containing 1024 sets?Solution: From 263.68 T...
Computer Science Junction...
Tag :computer science study material for gate exam
  October 2, 2017, 6:08 am
Here you will get various article related to operating system concepts and examples that will help you to solve the operating system based questions for Gate Exam.Memory Management1.  Bare Machine and Resident Monitor2. Dynamic Relocation in Memory management3. Dynamic Loading and Dynamic Linking in Memory Management4. Memory Protection in Contiguous Allocation5. Swapping in Memory Management6. Segmentation in Memory Management7. Contiguous and Non Contiguous Memory Allocation8. Paging Technique in Memory Management9. Introduction to FragmentationOperating System Based Questions for Gate Exam1. Process based questions for gate exam2.&nbs...
Computer Science Junction...
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  September 30, 2017, 2:18 pm
                                      COMPUTER ORGANIZATION AND ARCHITECTURE                                        (CPU Control Design, Memory Interface, I/O Interface)                                                                   Practice SET 41. Consider a logical address space of 8 pages of 512 words each mapped onto a p...
Computer Science Junction...
Tag :computer science study material for gate exam
  September 30, 2017, 10:57 am
                                                COMPUTER ORGANIZATION AND ARCHITECTURE                                                                                    Set -4 SOLUTION1. Consider a logical address space of 8 pages of 512 words each mapped onto a physical memory of 64 frames. How many bits are there in physical address?Solution: From 15.45 To 14.552. ...
Computer Science Junction...
Tag :computer science study material for gate exam
  September 30, 2017, 10:53 am
Process , Thread and Cpu scheduling based questions for gate exam(1)Consider a set of n tasks with known runtimes r1,r2,........rn to be run on a uniprocessor machine. Which of the following processor scheduling algorithms will result in the maximum throughput ? (A) Round-Robin (B) Shortest-Job-First(C) Highest-Response-Ratio-Next (D) First-come-First-Served(2) Where does the swap space resides ?(      a)    RAM (b) ROM (c) DISK (d) On- Chip Cache(3) Which of the following scheduling algorithms is non-preemptive ? (A) Round Robin (B) First-In First-Out (C)Multilevel Queue Scheduling (D)Multilevel Queue Scheduling with Feedback(4) Which combination of the followi...
Computer Science Junction...
Tag :operating system study material for gate exam
  September 21, 2017, 7:05 pm
What is Process Synchronization?Process Synchronization is a mechanism by which more than one processes concurrently share a resource in such a way that they can utilize the resource without any deadlock.A critical section is a program segment where shared resource is accessed by the concurrent processes.Here in this post we  are telling about some questions from process synchronization section which were asked in previous year in gate exam1. A critical section is a program segment     Gate ( 1996) (a) which should run in a certain specified amount of time(b) which avoids deadlocks(c) where shared resources are accessed(d) which must be enclosed by a pair of semaphore ope...
Computer Science Junction...
Tag :Operating system questions for gate
  September 14, 2017, 1:13 am
What is Cookie ?Cookies are a mechanism that a servlet uses to have clients hold a small amount of state-information associated with the user. Servlets can use the information in a cookie as the user enters a site (as a low-security user sign-on, for example), as the user navigates around a site (as a repository of user preferences for example), or both.Handling All Browsers through CookieBy default, session tracking uses cookies to associate a session identifier with a user. To also support users that access a servlet with a browser that does not support cookies, or that is set up to reject cookies, you must use URL rewriting instead.When you use URL rewriting you call methods that, when ne...
Computer Science Junction...
Tag :website uses cookies
  August 21, 2017, 6:32 am
What is Session Tracking ?The Servlet API provides two ways to track client state:Session TrackingSession tracking is a mechanism that servlets use to maintain state about a series of requests from the same user (that is, requests originating from the same browser) across some period of time.CookiesCookies are a mechanism that a servlet uses to have clients hold a small amount of state-information associated withthe user. Servlets can use the information in a cookie as the user enters a site (as a low-security user sign-on, for example), as the user navigates around a site (as a repository of user preferences for example), or both.Session TrackingSession tracking is a mechanism that servlet...
Computer Science Junction...
Tag :Servlet
  August 6, 2017, 12:22 pm
What is Session Tracking ?The Servlet API provides two ways to track client state:Session TrackingSession tracking is a mechanism that servlets use to maintain state about a series of requests from the same user (that is, requests originating from the same browser) across some period of time.CookiesCookies are a mechanism that a servlet uses to have clients hold a small amount of state-information associated withthe user. Servlets can use the information in a cookie as the user enters a site (as a low-security user sign-on, for example), as the user navigates around a site (as a repository of user preferences for example), or both.Session TrackingSession tracking is a mechanism that servlet...
Computer Science Junction...
Tag :Servlet
  August 6, 2017, 12:22 pm
What is Content Based Image Retrieval ?Image databases and collections can be enormous in size, containing hundreds, thousands or even millions of images. The conventional method of image retrieval is searching for a keyword that would match the descriptive keyword assigned to the image by a human categorize. Currently under development, even though several systems exist, is the retrieval of images based on their content, called Content Based Image Retrieval, CBIR. While computationally expensive, the results are far more accurate than conventional image indexing. Hence, there exists a tradeoff between accuracy and computational cost. This tradeoff decreases as more efficient algorithms are ...
Computer Science Junction...
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  August 6, 2017, 12:21 pm
Challenges of Data Transmission in Wireless Sensor NetworkEfficiency of data transmission in wireless sensor network is highly affected by architecture model used for routing the data packets in the network. Depending upon the application different architecture and design issues are considered for data transmission in wireless sensor network. In wireless sensor network designing of routing protocol for data transmission is an important task and it is influenced by many challenges such as characteristics of sensor network and nodes properties. Some of the challenges that need to overcome during design of routing protocol for data transmission are as follows: ·     &n...
Computer Science Junction...
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  August 6, 2017, 12:21 pm
Status of Cyber Attacks in India from 1 Januaryy 2017 to June 30 June 2017In every 10 minutes there is one cyber crime in  India . In the starting of 2017 the ransomeware attack that hit hundereds of the systems. From that day at least one cyber crime was reported every 10 minute in India in the first six months of this year. This counting is much larger than the year 2016 when one such type of crime was reported eveery 12 minutes.According to data report of the  ICERT (Indian Computer Emergency Response Team) a total of 27482 cases of cyber crime have been reported from January 1 to June 30. These cyber crime attacks include phishing, scanning, probing, website intr...
Computer Science Junction...
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  July 23, 2017, 9:19 am
Questions Bank for Operating System Subject                                                                 Unit 1 Type 1. 2 Marks Questions(1) What is Spooling?(2) What is system call?(3) What do you mean by kernel?(4) What is Operating System?(5) What is reentrant kernel?(6) Symmetric and Asymmetric Multiprocessing.(7) Write the difference between multiprogramming and multiprocessing.(8) What is shell?Type 2: Short Note Type Write the short note on the following(1) Real Time System(2) Multiprogramming system(3) Multip...
Computer Science Junction...
Tag :Operating System Objective Questions
  July 15, 2017, 5:52 am
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